qat.experimental.system_data.hardware.qblox.target module

Dependency-neutral target description for Qblox hardware.

The records in this module model the Q1 sequencer and module architecture documented by Qblox. They describe a compilation target, not the installed hardware or its calibrated configuration.

See:

class AcquisitionConnectionMode(*values)

Bases: str, Enum

Acquisition connection parameters exposed by one module kind.

combined = 'combined'
components = 'components'
none = 'none'
class LocalOscillatorSpec(min_frequency_hz, max_frequency_hz, frequency_step_hz=1)

Bases: object

Frequency limits of a module-local oscillator.

frequency_step_hz: int
max_frequency_hz: int
min_frequency_hz: int
supports(frequency_hz)

Return whether frequency_hz is representable by this oscillator.

Return type:

bool

class MarkerBitRole(*values)

Bases: str, Enum

Kind of physical destination controlled by one Q1 mrk bit.

Variables:

  • marker_output – Front-panel marker output channel.

  • output_switch – RF output-enable switch.

marker_output = 'marker_output'
output_switch = 'output_switch'
class MarkerBitTarget(role, channel)

Bases: object

One physical destination controlled by a Q1 mrk bit.

channel is the zero-based compiler identifier for the destination. Module documentation labels baseband marker outputs as M1 through M4 and QRC output as M0. These correspond to compiler channels 0 through 3 and channel 0 respectively.

Variables:

  • role – Kind of physical destination controlled by the bit.

  • channel – Zero-based compiler channel identifier for that destination.

channel: int
role: MarkerBitRole
class ModuleSpec(kind, sequencers, output_count, input_count, output_channel_map, marker_bit_0, marker_bit_1, marker_bit_2, marker_bit_3, input_channel_map=<factory>, acquisition_memory_bins=None, supports_mixer_correction=True, supports_local_oscillator_enable=True, supports_awg_modulation=True, supports_acquisition_demodulation=True, output_path_components=frozenset({SignalPath.i, SignalPath.q}), acquisition_connection_mode=AcquisitionConnectionMode.none, is_rf=False, local_oscillator=None)

Bases: object

Physical sequencer bank, channel map, and Q1 marker-bit routing.

Each marker_bit_* field identifies the single physical destination controlled by that Q1 mrk bit. None marks an unused bit.

Variables:

  • kind – Qblox module kind described by this record.

  • sequencers – Sequencer type at each physical sequencer index.

  • output_count – Number of physical output channels.

  • input_count – Number of physical input channels.

  • output_channel_map – Sequencer indices permitted to drive each output channel.

  • marker_bit_0 – Destination controlled by Q1 mrk bit 0, or None.

  • marker_bit_1 – Destination controlled by Q1 mrk bit 1, or None.

  • marker_bit_2 – Destination controlled by Q1 mrk bit 2, or None.

  • marker_bit_3 – Destination controlled by Q1 mrk bit 3, or None.

  • input_channel_map – Sequencer indices permitted to acquire from each input channel.

  • acquisition_memory_bins – Total acquisition bins shared by the module.

  • supports_mixer_correction – Whether the module supports mixer corrections.

  • supports_local_oscillator_enable – Whether local oscillators can be enabled.

  • supports_awg_modulation – Whether AWG output paths support modulation.

  • supports_acquisition_demodulation – Whether acquisition paths support demodulation.

  • output_path_components – Signal components accepted by an output connection.

  • acquisition_connection_mode – Form of acquisition connection exposed by the module.

  • is_rf – Whether the module carries an RF front end. An RF module exposes one logical I/O port per RF chain and derives its I and Q lanes internally, so a connection may name only one port index. This mirrors qblox_instruments.types.TypeHandle.is_rf_type for QCM-RF, QRM-RF, and QRC.

  • local_oscillator – Integrated local-oscillator limits, or None.

acquisition_components(path)

Return component API fields represented by an acquisition path.

Return type:

tuple[SignalPath, ...]

acquisition_connection_mode: AcquisitionConnectionMode
acquisition_memory_bins: int | None
property acquisition_path_components: frozenset[SignalPath]

Return acquisition path values accepted by direct configuration.

input_channel_map: frozendict[int, tuple[int, ...]]
input_count: int
is_rf: bool
kind: QbloxModuleKind
local_oscillator: LocalOscillatorSpec | None
marker_bit_0: MarkerBitTarget | None
marker_bit_1: MarkerBitTarget | None
marker_bit_2: MarkerBitTarget | None
marker_bit_3: MarkerBitTarget | None
output_channel_map: frozendict[int, tuple[int, ...]]
output_count: int
output_path_components: frozenset[SignalPath]
property sequencer_count: int

Return the number of physical Q1 sequencers.

sequencer_indices(type_=None)

Return all sequencer indices, optionally filtered by Q1 sequencer type.

Return type:

tuple[int, ...]

sequencers: tuple[Q1SequencerType, ...]
supports_acquisition_demodulation: bool
supports_awg_modulation: bool
supports_local_oscillator_enable: bool
supports_mixer_correction: bool
class Q1AsmSpec(min_gain=-32768, max_gain=32767, min_offset=-32768, max_offset=32767, rt_duration_resolution_ns=1, min_rt_duration_ns=4, max_rt_duration_ns=65535, min_wait_immediate_ns=0, max_wait_immediate_ns=65535, register_size=4294967295)

Bases: object

Immediate, duration, and register limits of the Q1ASM instruction set.

Q1 real-time instruction durations have 1 ns resolution and a 4 ns minimum non-zero duration. The wait instruction has a 16-bit immediate whose zero value is reserved for the documented real-time underflow-guard suspension behaviour.

See:

max_gain: int
max_offset: int
max_rt_duration_ns: int
max_wait_immediate_ns: int
min_gain: int
min_offset: int
min_rt_duration_ns: int
min_wait_immediate_ns: int
register_size: int
rt_duration_resolution_ns: int
class Q1SequencerFeature(*values)

Bases: str, Enum

Feature predicates exposed by a Q1 sequencer type.

acquisition = 'acquisition'
awg = 'awg'
class Q1SequencerSpec(type, instruction_capacity, q1_core_clock_period_ns=4, sample_period_ns=1, min_waveform_sample=-1.0, max_waveform_sample=1.0, nco_min_frequency_hz=-500000000.0, nco_max_frequency_hz=500000000.0, nco_phase_steps=1000000000, nco_phase_steps_per_degree=2777777.777777778, nco_frequency_steps_per_hz=4, nco_frequency_limit_steps=2000000000, register_count=64, waveform_sample_capacity=16384, readout=None)

Bases: object

Static limits and features of one Q1 sequencer type.

q1_core_clock_period_ns describes instruction issue timing such as nop. sample_period_ns describes the independent waveform memory sampling grid.

See:

property features: frozenset[Q1SequencerFeature]

Return the feature predicates implied by this sequencer type.

instruction_capacity: int
max_waveform_sample: float
min_waveform_sample: float
nco_frequency_limit_steps: int
nco_frequency_steps_per_hz: int
nco_max_frequency_hz: float
nco_min_frequency_hz: float
nco_phase_steps: int
nco_phase_steps_per_degree: float
q1_core_clock_period_ns: int
readout: ReadoutSpec | None
register_count: int
sample_period_ns: int
supports(feature)

Return whether this sequencer type provides feature.

Return type:

bool

type: Q1SequencerType
waveform_sample_capacity: int
class Q1SequencerType(*values)

Bases: str, Enum

Q1 sequencer types defined by Qblox.

control = 'control'
readout = 'readout'
class QbloxTargetDescription(q1asm, sequencer_specs, module_specs, min_module_slot=1, max_module_slot=20)

Bases: object

Immutable Qblox target specification and typed query boundary.

input_sequencers(kind, input_)

Return sequencers routable from a physical input channel.

Return type:

tuple[int, ...]

is_readout_sequencer(kind, index)

Return whether a physical sequencer is a readout sequencer.

Return type:

bool

max_module_slot: int
min_module_slot: int
module_spec(kind)

Return the target specification for kind.

Return type:

ModuleSpec

module_specs: frozendict[QbloxModuleKind, ModuleSpec]
output_sequencers(kind, output)

Return sequencers routable to a physical output channel.

Return type:

tuple[int, ...]

q1asm: Q1AsmSpec
sequencer(kind, index)

Return the module-bound target view of a physical sequencer.

Return type:

SequencerTarget

sequencer_spec(type_)

Return the shared target specification for a Q1 sequencer type.

Return type:

Q1SequencerSpec

sequencer_specs: frozendict[Q1SequencerType, Q1SequencerSpec]
supports(kind, index, feature)

Return whether a physical sequencer provides feature.

Return type:

bool

validate_module_location(location)

Validate that a module location is representable by this target.

Parameters:

location (QbloxModuleLocation) – Physical instrument and slot occupied by a module.

Raises:

ValueError – If the slot falls outside the target’s Cluster chassis.

Return type:

None

class ReadoutSpec(min_integration_length_samples=4, max_integration_length_samples=16777212, integration_length_step_samples=4, integration_sample_period_ns=1, weight_sample_period_ns=1, min_acquisition_threshold=-16777212, max_acquisition_threshold=16777212, weight_sample_capacity=16384)

Bases: object

Limits of the acquisition path added by a readout sequencer.

Integration length is measured in samples of integration_sample_period_ns and must be a multiple of integration_length_step_samples, independently of Q1 instruction duration constraints. Integration and weight limits follow the readout sequencer and sequencer API documentation.

See:

integration_length_step_samples: int
integration_sample_period_ns: int
max_acquisition_threshold: int
max_integration_length_samples: int
min_acquisition_threshold: int
min_integration_length_samples: int
weight_sample_capacity: int
weight_sample_period_ns: int
class SequencerTarget(index, sequencer_spec, output_channels, input_channels)

Bases: object

Module-bound view of one physical Q1 sequencer.

index: int
input_channels: tuple[int, ...]
output_channels: tuple[int, ...]
sequencer_spec: Q1SequencerSpec